6ef6871e98296b14b3ca · Temporal State Machines: Using temporal memory to stitch time-based graph computations
Temporal State Machines: Using temporal memory to stitch time-based graph computations
Race logic, an arrival-time-coded logic family, has demonstrated energy and performance improvements for a subset of applications ranging from dynamic programming to machine learning. In the absence of memory, or a mathematical framework for abstraction
{
"title_en": "Temporal State Machines: Using temporal memory to stitch time-based graph computations",
"designation": "",
"series": "",
"status": "",
"date": "2021-05-11",
"date_original": "May 11, 2021",
"url": "https://www.nist.gov/publications/temporal-state-machines-using-temporal-memory-stitch-time-based-graph-computations",
"source": "NIST Publications",
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"authors_en": "Advait Madhavan , Matthew Daniels , Mark D. Stiles",
"abstract_excerpt_en": "Race logic, an arrival-time-coded logic family, has demonstrated energy and performance improvements for a subset of applications ranging from dynamic programming to machine learning. In the absence of memory, or a mathematical framework for abstraction",
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{
"title_en": "Temporal State Machines: Using temporal memory to stitch time-based graph computations",
"designation": "",
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"date": "2021-05-11",
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"url": "https://www.nist.gov/publications/temporal-state-machines-using-temporal-memory-stitch-time-based-graph-computations",
"source": "NIST Publications",
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"authors_en": "Advait Madhavan , Matthew Daniels , Mark D. Stiles",
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