ac1d1e856cf741866e10 · A New Combinational Logic Minimization Technique with Applications to Cryptology
A New Combinational Logic Minimization Technique with Applications to Cryptology
A new technique for combinational logic optimization is described. The technique is a two-step process. In the first step, the non-linearity of a circuit - as measured by the number of non-linear gates it contains - is reduced. The second step reduces the
{
"title_en": "A New Combinational Logic Minimization Technique with Applications to Cryptology",
"designation": "",
"series": "",
"status": "",
"date": "2010-05-20",
"date_original": "May 20, 2010",
"url": "https://www.nist.gov/publications/new-combinational-logic-minimization-technique-applications-cryptology",
"source": "NIST Publications",
"display_en": "",
"authors_en": "Joan Boyar, Rene Peralta",
"abstract_excerpt_en": "A new technique for combinational logic optimization is described. The technique is a two-step process. In the first step, the non-linearity of a circuit - as measured by the number of non-linear gates it contains - is reduced. The second step reduces the",
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{
"title_en": "A New Combinational Logic Minimization Technique with Applications to Cryptology",
"designation": "",
"series": "",
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"date": "2010-05-20",
"date_original": "May 20, 2010",
"url": "https://www.nist.gov/publications/new-combinational-logic-minimization-technique-applications-cryptology",
"source": "NIST Publications",
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"authors_en": "Joan Boyar, Rene Peralta",
"abstract_excerpt_en": "A new technique for combinational logic optimization is described. The technique is a two-step process. In the first step, the non-linearity of a circuit - as measured by the number of non-linear gates it contains - is reduced. The second step reduces the"
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