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RFC4197 · Requirements for Edge-to-Edge Emulation of Time Division Multiplexed (TDM) Circuits over Packet Switching Networks

Requirements for Edge-to-Edge Emulation of Time Division Multiplexed (TDM) Circuits over Packet Switching Networks

This document defines the specific requirements for edge-to-edge emulation of circuits carrying Time Division Multiplexed (TDM) digital signals of the Plesiochronous Digital Hierarchy as well as the Synchronous Optical NETwork/Synchronous Digital Hierarchy over packet-switched networks. It is aligned to the common architecture for Pseudo Wire Emulation Edge-to-Edge (PWE3). It makes references to the generic requirements for PWE3 where applicable and complements them by defining requirements originating from specifics of TDM circuits. This memo provides information for the Internet community.

Официальная английская аннотация

This document defines the specific requirements for edge-to-edge emulation of circuits carrying Time Division Multiplexed (TDM) digital signals of the Plesiochronous Digital Hierarchy as well as the Synchronous Optical NETwork/Synchronous Digital Hierarchy over packet-switched networks. It is aligned to the common architecture for Pseudo Wire Emulation Edge-to-Edge (PWE3). It makes references to the generic requirements for PWE3 where applicable and complements them by defining requirements originating from specifics of TDM circuits. This memo provides information for the Internet community.

Связи документа

Официальный источник · 2005-10-01

Полные импортированные сведения карточки
{
  "id": "RFC4197",
  "number": 4197,
  "title_en": "Requirements for Edge-to-Edge Emulation of Time Division Multiplexed (TDM) Circuits over Packet Switching Networks",
  "title_ru": "",
  "summary_ru": "",
  "purpose_ru": "",
  "use_ru": "",
  "full_translation_path": "",
  "full_translation_checked_at": "",
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  "architect_note_ru": "",
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  "translation_state": "not_prepared",
  "verification_level": "not_prepared",
  "verification_level_ru": "Русская выжимка не подготовлена",
  "verification_note_ru": "",
  "abstract_en": "This document defines the specific requirements for edge-to-edge emulation of circuits carrying Time Division Multiplexed (TDM) digital signals of the Plesiochronous Digital Hierarchy as well as the Synchronous Optical NETwork/Synchronous Digital Hierarchy over packet-switched networks. It is aligned to the common architecture for Pseudo Wire Emulation Edge-to-Edge (PWE3). It makes references to the generic requirements for PWE3 where applicable and complements them by defining requirements originating from specifics of TDM circuits. This memo provides information for the Internet community.",
  "authors": [
    "M. Riegel"
  ],
  "organizations": [],
  "publication_date": "2005-10-01",
  "current_status": "INFORMATIONAL",
  "current_status_ru": "Информационный",
  "publication_status": "INFORMATIONAL",
  "publication_status_ru": "Информационный",
  "lifecycle": "informational",
  "lifecycle_ru": "Справочный",
  "stream": "IETF",
  "stream_ru": "IETF",
  "area": "rtg",
  "area_ru": "Маршрутизация",
  "working_group": "pwe3",
  "source_draft": "draft-ietf-pwe3-tdm-requirements-08",
  "page_count": 24,
  "doi": "10.17487/RFC4197",
  "keywords": [
    "digital signatures",
    "plesiochronous digital hierarchy",
    "sonet",
    "synchronous optical network",
    "sdh",
    "synchronous digital hierarchy",
    "pwe3",
    "pseudo wire emulation"
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    "html": "https://www.rfc-editor.org/rfc/rfc4197.html",
    "txt": "https://www.rfc-editor.org/rfc/rfc4197.txt",
    "datatracker": "https://datatracker.ietf.org/doc/rfc4197/"
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}